1. 참조 사이트
2. 부팅 모드
부팅 스위치를 아래와 1, 3번 ON , 나머지 OFF
3. U-boot-spl.bin 파일과 u-boot.img 다운로드 하기
*The release package does not contain the binary for UART boot. Please follow the steps mentioned here for compiling u-boot and use the spl/u-boot-spl.bin file that is produced.
1. Switch ON EVM with switch settings for UART boot. When “CCCC” characters appear on TeraTerm window, from the File Menu select Transfer --> XMODEM --> Send (1K mode)
2. Select “u-boot-spl.bin” for the transfer
3. After image is successfully downloaded, the ROM code will boot it.
4. When “CCCC” characters appear on TeraTerm window, from the File Menu select Transfer --> YMODEM --> Send (1K mode)
5. Select “u-boot.img” for the transfer
6. After image is successfully downloaded, U-Boot will boot it.
7. Hit enter and get to u-boot prompt “U-Boot# ”
|
위의 글을 참조하여 테스트 해 보았습니다.
Mango-AM335x-ST 보드에 UART to Serial 보드를 연결하고,
부팅 스위치를 1, 3번 ON, 나머지 off 상태에서 부팅을 합니다.
PC에 터미널 프로그램은 Tera Term을 설치하였습니다.
장치관리자에서 COM port를 확인 합니다.
저는 포트 번호 205번 입니다.
설정은 아래와 같이 합니다.
전원을 인가를 합니다. Uart 터미널 창에 “CCCC”가 메시지가 출력이 됩니다.
u-boot-spl.bin 바이너리를 다운로드 합니다.
Teratem에서 Transfer -> XMODEM -> Send 선택
u-boot-spl.bin 파일 선택
다운로드가 완료 후
터미널 창에 “CCCC”가 메시지가 출력이 됩니다.
메시지 “C”가 나오면 바로 YMODEM으로 u-boot.img파일을 전송합니다.
Transfer -> YMODEM -> Send 선택
u-boot.img 파일을 선택합니다.
u-boot.img 이미지 YMODEM 을 통하여 다운로드 과정
부팅 결과
4. 문제점 수정
u-boot-spl.bin 파일을 load하면 hang이 걸린다.
U-Boot SPL 2013.01.01 (Jun 29 2016 - 13:59:13)
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Peripheral mode controller at 47401000 using PIO, IRQ 0
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Host mode controller at 47401800 using PIO, IRQ 0
### ERROR ### Please RESET the board ###
|
코드를 참조하면
"common/spl/spl.c"
inline void hang(void)
{
puts("### ERROR ### Please RESET the board ###\n");
for (;;)
;
}
|
로그를 좀 더 살펴보면 ,
"include/common.h" 파일에서
#define CRZ_DEBUG
정의해서 다시 다운로드를 해 보면, 아래와 같이 메시지가 나옵니다.
U-Boot SPL 2013.01.01 (Jun 29 2016 - 15:24:11)
[CRZ] mux.c (366) enable_i2c0_pin_mux:
[CRZ] board.c (809) s_init:
[CRZ] board.c (94) read_eeprom:
[CRZ] mux.c (485) enable_board_pin_mux: AM3358, Start EVM
[CRZ] mux.c (378) enable_spi0_pin_mux:
[CRZ] mux.c (372) enable_nand_pin_mux:
[CRZ] board.c (874) s_init:
[CRZ] board.c (905) s_init:
[CRZ] spl.c (162) board_init_r:
[CRZ] timer.c (52) timer_init:
[CRZ] boot-common.c (59) spl_board_init:
[CRZ] mem.c (90) gpmc_init:
[CRZ] mem.c (66) enable_gpmc_cs_config:
[CRZ] board.c (445) am33xx_spl_board_init:
[CRZ] board.c (142) arch_misc_init:
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Peripheral mode controller at 47401000 using PIO, IRQ 0
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Host mode controller at 47401800 using PIO, IRQ 0
[CRZ] boot-common.c (45) spl_boot_device: boot_params.omap_bootdevice: 0x41
[CRZ] spl.c (182) board_init_r: boot device - 65
[CRZ] spl.c (246) board_init_r: SPL: Un-supported Boot Device
### ERROR ### Please RESET the board ###
|
#define BOOT_DEVICE_UART 65
./arch/arm/include/asm/arch-am33xx/spl.h
|
"include/configs/am335x_evm.h" 파일에 아래와 같이 수정
#define CONFIG_SPL_YMODEM_SUPPORT
|
컴파일 후 이미지를 올리면 아래와 같이 부팅 되는 것을 볼 수 있습니다.
?CCCCCC
U-Boot SPL 2013.01.01 (Jun 29 2016 - 15:34:15)
[CRZ] mux.c (366) enable_i2c0_pin_mux:
[CRZ] board.c (809) s_init:
[CRZ] board.c (94) read_eeprom:
[CRZ] mux.c (485) enable_board_pin_mux: AM3358, Start EVM
[CRZ] mux.c (378) enable_spi0_pin_mux:
[CRZ] mux.c (372) enable_nand_pin_mux:
[CRZ] board.c (874) s_init:
[CRZ] board.c (905) s_init:
[CRZ] spl.c (162) board_init_r:
[CRZ] timer.c (52) timer_init:
[CRZ] boot-common.c (59) spl_board_init:
[CRZ] mem.c (90) gpmc_init:
[CRZ] mem.c (66) enable_gpmc_cs_config:
[CRZ] board.c (445) am33xx_spl_board_init:
[CRZ] board.c (142) arch_misc_init:
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Peripheral mode controller at 47401000 using PIO, IRQ 0
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Host mode controller at 47401800 using PIO, IRQ 0
[CRZ] boot-common.c (45) spl_boot_device: boot_params.omap_bootdevice: 0x41
[CRZ] spl.c (182) board_init_r: boot device - 65
[CRZ] spl.c (219) board_init_r: BOOT_DEVICE_UART
CCxyzModem - CRC mode, 0(SOH)/474(STX)/0(CAN) packets, 6 retries
Loaded 482708 bytes
[CRZ] spl.c (252) board_init_r: Jumping to U-Boot
[CRZ] spl.c (133) jump_to_image_no_args: image entry point: 0x80800000
U-Boot 2013.01.01 (Jun 29 2016 - 15:34:15)
I2C: ready
DRAM: 512 MiB
WARNING: Caches not enabled
[CRZ] board.c (955) board_init:
[CRZ] mux.c (378) enable_spi0_pin_mux:
[CRZ] mux.c (372) enable_nand_pin_mux:
[CRZ] board.c (926) check_reset_status: PRM_RSTST: 0x00000001
[CRZ] board.c (946) check_reset_status: Power-on reset has occurred.
[CRZ] board.c (968) board_init:
[CRZ] board.c (94) read_eeprom:
[CRZ] mem.c (90) gpmc_init:
[CRZ] mem.c (66) enable_gpmc_cs_config:
NAND: [CRZ] nand.c (107) nand_init:
[CRZ] nand.c (87) nand_init_chip:
[CRZ] omap_gpmc.c (797) board_nand_init:
[CRZ] omap_gpmc.c (847) board_nand_init: AM33XX NAND_ECC_HW
[CRZ] nand_base.c (3240) nand_scan:
[CRZ] nand_base.c (2920) nand_scan_ident:
[CRZ] nand_base.c (2610) nand_get_flash_type:
[CRZ] nand_base.c (2686) nand_get_flash_type: chip->cellinfo: 0x10, extid: 0x95
[CRZ] nand_base.c (2746) nand_get_flash_type: mtd->writesize: 0x800
[CRZ] nand_base.c (2764) nand_get_flash_type: busw: 0x0
[CRZ] nand_base.c (2841) nand_get_flash_type: NAND_LARGE_BADBLOCK_POS
[CRZ] nand.c (53) nand_register:
256 MiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
*** Warning - bad CRC, using default environment
[CRZ] board.c (142) arch_misc_init:
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Peripheral mode controller at 47401000 using PIO, IRQ 0
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Host mode controller at 47401800 using PIO, IRQ 0
[CRZ] board.c (982) board_late_init:
[CRZ] mux.c (378) enable_spi0_pin_mux:
[CRZ] mux.c (372) enable_nand_pin_mux:
Net: [CRZ] board.c (1057) board_eth_init:
not set. Validating first E-fuse MAC
cpsw, usb_ether
Hit enter key to stop autoboot: 0
U-Boot#
U-Boot#
U-Boot#
U-Boot#
U-Boot#
|